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RTIC - The hardware accelerated RTOS

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Welcome to the chat room for RTIC, the hardware accelerated RTOS written in Rust! | Documentation: https://rtic.rs/ | Discuss, coordinate, help: https://github.com/rtic-rs | Meeting-notes: https://rtic.rs/meeting | Code of conduct: https://www.rust-lang.org/conduct.html90 Servers

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5 Feb 2025
@romancardenas:matrix.orgromancardenasYep19:56:00
@korken89:matrix.orgkorken89 Alright, does indeed sound like a PendSV based runner I played with before RTIC 1 so I think I get the concept 19:56:56
@romancardenas:matrix.orgromancardenasFrom the user point of view: - Only software tasks - No need to defne dispatchers, the only dispatcher is fixed (e.g., machine environment call exception) - More overhead than a pure hardware backend19:59:19
@afoht:matrix.orgAfoHT One quick question regarding the PR, was there some issue with it being unable to run the static example? or maybe it just got removed? 19:59:49
@korken89:matrix.orgkorken89Even if you only have a single priority level?19:59:57
@korken89:matrix.orgkorken89Sounds like it should be equivalent as a single dispatcher case20:00:14
@korken89:matrix.orgkorken89And get worse if you add more priority level?20:00:28
@romancardenas:matrix.orgromancardenas
In reply to @afoht:matrix.org
One quick question regarding the PR, was there some issue with it being unable to run the static example? or maybe it just got removed?
Yep, exceptions cannot be disabled and a task was triggered before building the static struct. It is already fixed
20:01:49
@romancardenas:matrix.orgromancardenas
In reply to @korken89:matrix.org
Sounds like it should be equivalent as a single dispatcher case
RTIC still creates one dispatcher per priority level and respects its order
20:02:45
@korken89:matrix.orgkorken89Yeah, in a single dispatcher case one needs a priority queue instead of having the hardware do priority handling20:03:44
@romancardenas:matrix.orgromancardenasSLIC uses heapless priority queue :)20:04:33
@korken89:matrix.orgkorken89Ah :)20:04:41
@korken89:matrix.orgkorken89But this seems to make sense20:04:50
@afoht:matrix.orgAfoHT:)20:07:53
@korken89:matrix.orgkorken89What's the next step?20:10:14
@korken89:matrix.orgkorken89 I guess the git reference in the Cargo.toml needs a release first? 20:10:26
@romancardenas:matrix.orgromancardenasYes, I was waiting for feedback from you in case I had to make some changes before the release20:11:00
@afoht:matrix.orgAfoHTI added a small nitpick, and the TODO is waiting for your release I gather?20:13:58
@afoht:matrix.orgAfoHT Since RISC-V support is (still?) wild west (we still need to document it better even why not :D 20:15:36
@romancardenas:matrix.orgromancardenasYep, will address them ASAP20:15:50
@romancardenas:matrix.orgromancardenasAlso I'll try to write some docs 😅20:16:03
@korken89:matrix.orgkorken89❤️20:16:37
@afoht:matrix.orgAfoHTWell done :) 20:17:48
@afoht:matrix.orgAfoHTI think I unfortunately need to get going, but productive meeting tonight, thank you all!20:18:06
@korken89:matrix.orgkorken89Thanks for tonight!20:18:38
@romancardenas:matrix.orgromancardenasThanks!20:18:47
@korken89:matrix.orgkorken89Oh I have completely missed that const asm is stabilized20:25:54
@korken89:matrix.orgkorken89https://rust.godbolt.org/z/fPK5Mh5sz20:25:56
8 Feb 2025
@guineawheek:matrix.orgGuinea Wheek to be very clear, i still have no idea why it happens 05:08:08
9 Feb 2025
@guineawheek:matrix.orgGuinea Wheekother notes: the sender and receiver seem to both be both software tasks03:57:31

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