!WqsLCItsZbJGhRjnxP:matrix.org

stm32-rs

478 Members
Discussion and support for stm32-rs projects. History is publicly viewable. Bridged to #stm32-rs on Libera IRC. Code of conduct: https://www.rust-lang.org/conduct.html. Public logs: https://libera.irclog.whitequark.org/stm32-rs54 Servers

Load older messages


SenderMessageTime
18 Apr 2024
@tomasz.fortuna:im.jakby.coblaNot a best solution, but maybe good test to understand the problem better.18:34:28
@dngrs:matrix.orgdngrsyeah I had the same thought18:35:51
@tomasz.fortuna:im.jakby.cobla config.rcc.mux.clk48sel = mux::Clk48sel::PLL1_Q; is an addition from march 19. Make sure you're on pretty recent embassy. 18:35:55
@tomasz.fortuna:im.jakby.coblaAlthough I'd assume that's a compile error to omit this.18:36:03
@dngrs:matrix.orgdngrsyeah, it's all git18:36:08
@dngrs:matrix.orgdngrsbut good point too, I was about to bring up that this is a fresh checkout, maybe some known bug18:36:26
@tomasz.fortuna:im.jakby.coblaHseMode::Bypass - G4 has Oscillator. That might be board specific.18:38:06
@tomasz.fortuna:im.jakby.coblaI don't remember what it does though.18:38:12
@tomasz.fortuna:im.jakby.cobla config.rcc.mux.clk48sel = mux::Clk48sel::HSI48; I guess that enables HSI instead of HSE. At least partially. 18:40:12
@tomasz.fortuna:im.jakby.coblaYeah, I think you need Oscillator.18:44:20
@dngrs:matrix.orgdngrs

Generated a HSI based configuration with cube and we're getting somewhere. The app still hangs somewhere but it's past the rng init now.
ooooh wait a minute lol, I probably need to supply memory.x
anyway, thanks! This seems to work for init, I'll take the rest of my issues to the embassy room:

    let mut config = Config::default();
    {
        use embassy_stm32::rcc::*;
        config.rcc.pll_src = PllSource::HSI;
        config.rcc.pll = Some(Pll {
            prediv: PllPreDiv::DIV8,
            mul: PllMul::MUL96,
            divp: Some(PllPDiv::DIV2),
            divq: Some(PllQDiv::DIV4),
            divr: None,
        });
        config.rcc.ahb_pre = AHBPrescaler::DIV2;
        config.rcc.apb1_pre = APBPrescaler::DIV2;
        config.rcc.apb2_pre = APBPrescaler::DIV1;
        config.rcc.sys = Sysclk::PLL1_P;
        config.rcc.mux.clk48sel = mux::Clk48sel::PLL1_Q;
    }
    let p = embassy_stm32::init(config);

    let mut rng = Rng::new(p.RNG, Irqs);
    let mut seed = [0; 8];
    let _ = rng.async_fill_bytes(&mut seed).await;
    info!("rng initialized");
19:59:18
@tomasz.fortuna:im.jakby.coblaTry Hse with Oscillator though. :) I'm curious.20:34:51
@dngrs:matrix.orgdngrs you mean my previous code, just change Bypass to Oscillator? 20:36:19
@dngrs:matrix.orgdngrs(what even is the meaning of this flag?)20:36:40
@tomasz.fortuna:im.jakby.coblaIt's either oscillator (quartz afaik) using osc_in and out pins, or some generated signal on osc_in only20:39:04
@tomasz.fortuna:im.jakby.coblaIt supposedly frees the pin.20:39:13
@tomasz.fortuna:im.jakby.coblaIf I'm not mistaken.20:39:19
@dngrs:matrix.orgdngrs
In reply to @dngrs:matrix.org
you mean my previous code, just change Bypass to Oscillator?
is that what you meant? Or sth different?
20:40:45
19 Apr 2024
@jo_we:matrix.orgjo_we
In reply to @burrbull:matrix.org
Just import SpiCommon trait and mark it as impl Into<SPI1:Sck>. See https://github.com/stm32-rs/stm32f4xx-hal/blob/403fddbdab864699143ae54becd124beeda69569/src/spi.rs#L464
if i have a SPI::Nss pin, and i select the SPI device to let software handle the Nss pin (via CR1 register on stm32f407, bit SSM), is it possible to manually set the pin SPI::Nss high and low? I cant seem to find a working into()-Call that keeps my abstraction, and not require me to set the type to a specific pin?
13:58:33
@burrbull:matrix.orgburrbull
In reply to @jo_we:matrix.org
if i have a SPI::Nss pin, and i select the SPI device to let software handle the Nss pin (via CR1 register on stm32f407, bit SSM), is it possible to manually set the pin SPI::Nss high and low? I cant seem to find a working into()-Call that keeps my abstraction, and not require me to set the type to a specific pin?
If you are using software NSS it should be just Pin<Output<PushPull>>> pin, not an SPI::Nss (which is for hardware NSS, hal's master Spi even does not take it). Just use .into_push_pull_output() on any pin you want to use as Nss.
(impl embedded_hal::digital::Output if you need generics)
15:30:05
@jo_we:matrix.orgjo_wehm but if i take a Pin<Output<PushPull>>>, i cannot verify that i get a pin specifically designed to be an NSS pin (according to the datasheet). thats what i want to achieve. I want a pin via function parameter from which i know that its intended usage is as SPI::Nss, which I'll have to set high or low manually15:34:18
@burrbull:matrix.orgburrbull
In reply to @jo_we:matrix.org
hm but if i take a Pin<Output<PushPull>>>, i cannot verify that i get a pin specifically designed to be an NSS pin (according to the datasheet). thats what i want to achieve. I want a pin via function parameter from which i know that its intended usage is as SPI::Nss, which I'll have to set high or low manually
You can use ANY output pin for NSS. Several ones if you manage several devices. Datasheet specifies only hardware-driven NSS.
15:41:48
@burrbull:matrix.orgburrbull
In reply to @jo_we:matrix.org
hm but if i take a Pin<Output<PushPull>>>, i cannot verify that i get a pin specifically designed to be an NSS pin (according to the datasheet). thats what i want to achieve. I want a pin via function parameter from which i know that its intended usage is as SPI::Nss, which I'll have to set high or low manually
* You can use ANY output pin for NSS (including but not limited by that is in datasheet). Several ones if you manage several devices. Datasheet specifies only hardware-driven NSS.
15:43:53
@jo_we:matrix.orgjo_we

yes, for sure, I know that i can use any output pin for datasheet, however the hal defines via SPI::Nss spezializations which pins the datasheet assigns as Nss intended use. for example for spi3 (Implementation of SpiCommon)

        <Nss, PushPull> for [
            PA4<6>,

            PA15<6>,
        ],

id like my function parameter to be limited to these pins all while switching them manually internally

15:52:53
@jo_we:matrix.orgjo_weis anything like that possible?15:53:24
@jo_we:matrix.orgjo_we *

yes, for sure, I know that i can use any output pin for NSS, however the hal defines via SPI::Nss spezializations which pins the datasheet assigns as Nss intended use. for example for spi3 (Implementation of SpiCommon)

        <Nss, PushPull> for [
            PA4<6>,

            PA15<6>,
        ],

id like my function parameter to be limited to these pins all while switching them manually internally

15:54:52
@jo_we:matrix.orgjo_we *

yes, for sure, I know that i can use any output pin for NSS, however the hal defines via SPI::Nss spezializations which pins the datasheet assigns as Nss intended use. for example for spi3 (Implementation of SpiCommon) under src/gpio/alt/f4.rs

        <Nss, PushPull> for [
            PA4<6>,

            PA15<6>,
        ],

id like my function parameter to be limited to these pins all while switching them manually internally

15:55:44
@jo_we:matrix.orgjo_we *

yes, for sure, I know that i can use any output pin for NSS, however the hal defines via SPI::Nss spezializations which pins the datasheet assigns as Nss intended use. for example for spi3 (Implementation of SpiCommon) under src/gpio/alt/f4.rs

        <Nss, PushPull> for [
            PA4<6>,

            PA15<6>,
        ],

id like my function parameter to be limited to these pins all while switching them manually internally

15:55:58
@burrbull:matrix.orgburrbull
In reply to @jo_we:matrix.org
is anything like that possible?
Maybe if you create your own trait? Something like this should work: https://play.rust-lang.org/?version=stable&mode=debug&edition=2021&gist=57a9677aab05988055f2f3e26395e872
16:02:57
@kebonly:matrix.orgKevin Ly joined the room.16:07:38

Show newer messages


Back to Room ListRoom Version: 5