| 25 May 2023 |
 firefrommoonlight | Yea, H5 seems p similar to H7 | 01:28:12 |
| firefrommoonlight | With some flash considerations from L5 | 01:28:24 |
| firefrommoonlight | And the standard SVD idiosyncrasies that vary from chip to chip that you escape and I mitigate | 01:29:15 |
| firefrommoonlight | I haven't ops tested this one yet, but may use it in a future flight controller design | 01:29:38 |
| firefrommoonlight | Would probably be a better choice than the G4s I'm using for the smaller/cheaper ones I have now | 01:30:07 |
 x-yl | Working on a QSPI interface for stm32f4xx-hal and I was wondering where I might find the address for the QUADSPI memory-mapped range? grepping for 9000_0000 (which is the address on stm32f412) on the stm32-rs repo has no results so I'm not too sure where to look | 13:30:32 |
 burrbull | In reply to @x-yl:matrix.org
Working on a QSPI interface for stm32f4xx-hal and I was wondering where I might find the address for the QUADSPI memory-mapped range? grepping for 9000_0000 (which is the address on stm32f412) on the stm32-rs repo has no results so I'm not too sure where to look
crate::pac::QUADSPI::ptr() shoud point to peripheral.- Do you plan to place it independent crate or inside
stm32f4xx-hal?
- Have you looked at
f7/h7/l4xx-hal. All of them already have its own implementation.
| 15:28:37 |
| burrbull | In reply to @x-yl:matrix.org
Working on a QSPI interface for stm32f4xx-hal and I was wondering where I might find the address for the QUADSPI memory-mapped range? grepping for 9000_0000 (which is the address on stm32f412) on the stm32-rs repo has no results so I'm not too sure where to look *
crate::pac::QUADSPI::ptr() shoud point to peripheral.- Do you plan to place it independent crate or inside
stm32f4xx-hal?
- Have you looked at
f7/h7/l4xx-hal. Each of them already have its own implementation.
| 15:28:57 |
 dirbaio |
crate::pac::QUADSPI::ptr() shoud point to peripheral.
that's the qspi regs, not the qspi memory-mapped region
| 15:31:48 |
| dirbaio | The 0x9000_0000 addr is not in the PAC, I'd just hardcode it | 15:32:09 |
| x-yl |
- Yeah it's just the control register, not the actual memory mapped region
- Inside stm32f4xx-hal
- Yeah my implementation is largely based on the l4 hal but I don't think any of them support putting the QSPI in memory mapped mode
| 15:51:48 |
| x-yl | In reply to @dirbaio:matrix.org
The 0x9000_0000 addr is not in the PAC, I'd just hardcode it Cool, I'll do that then | 15:52:05 |
| burrbull | In reply to @x-yl:matrix.org
- Yeah it's just the control register, not the actual memory mapped region
- Inside stm32f4xx-hal
- Yeah my implementation is largely based on the l4 hal but I don't think any of them support putting the QSPI in memory mapped mode
This is partially adopted l4 file: https://github.com/stm32-rs/stm32f4xx-hal/blob/62fcd164fa0ceddc2729ab5ac445421066d9aa65/src/qspi/l4.rs | 16:02:10 |
| x-yl | Ah so is this already a WIP then? | 16:14:28 |
| burrbull | no. just experiment. all in your hands | 16:15:24 |
| x-yl | Ah okay then, you can look forward to a PR soonish then :) | 16:16:22 |
| 26 May 2023 |
|  gak joined the room. | 00:23:08 |
|  Nathaniel joined the room. | 09:49:41 |
| 27 May 2023 |
|  @timcook1:matrix.org joined the room. | 05:12:15 |
| @timcook1:matrix.org joined the room. | 05:56:34 |
| @timcook1:matrix.org left the room. | 05:56:35 |
| 28 May 2023 |
| x-yl | burrbull: I was wondering about this change: https://github.com/stm32-rs/stm32f4xx-hal/commit/6650964c084cb8f3cb5d6ad8e006f22bcfb4b44b. What's the purpose of splitting the new function for dual flash? is it just so that we can have impl Into on the argument? | 11:08:42 |
| burrbull | 
Download изображение.png | 11:16:37 |
| burrbull | mostly yes. | 11:16:47 |
| burrbull | Even without impl Into I'd prefer to see explicit pin types in new | 11:22:16 |
| x-yl | Fair enough, yeah, using the type system to enforce pin assignments is very cool but can be a bit confusing to figure out | 11:25:58 |
| burrbull | sometimes yes, but for now there is only 2 variants: single and dual flash | 11:27:27 |
| burrbull | * sometimes yes, but for now there are only 2 variants: single and dual flash | 11:28:58 |
| 1 Jun 2023 |
|  airbreather joined the room. | 04:08:20 |
|  schphil joined the room. | 14:50:06 |
