| 17 Oct 2021 |
 theunkn0wn1 | will do! | 00:11:09 |
 robyoung | Hi, what is a good source of randomness to source a PRNG on an stm32f411? Are there any examples of setting this up? | 17:43:41 |
 newam | For non-secure RNG you can sample a floating ADC pin as a seed. | 17:58:35 |
| newam | Otherwise there are built-in CSRNGs on some STMs, or you can use the ATSHA atmel chip to generate secure RNG externally. | 17:59:07 |
| robyoung | Brilliant thanks! 🙇 A floating ADC pin is perfect for me. It doesn't need to be truly random and there's no RNG peripheral on the chip I have unfortunately. | 18:12:13 |
 ryan-summers | Honestly, you can sample even non-floating ADC pins and accumulate the LSBs oftentimes, since the converter typically has noise built in, but again, generally not truly random | 18:30:33 |
 adamgreig | Certainly not a bad idea to only use the lsb and take 32 readings if you need a 32 bit seed | 18:34:37 |
| adamgreig | Still surprisingly predictable and vulnerable to external influence but a lot more likely to give a good non-secure seed than a single adc read | 18:35:11 |
| 18 Oct 2021 |
 pinealservo |
from what i can tell, about half the pins are pulled up, the others pulled down.
when a button is pressed one of the pull ups and one of the pull downs are bridged.
I have seen some keypad readers that rely on voltage dividers and an ADC in the microcontroller to detect which keys are being pressed.
| 21:21:05 |
| pinealservo | Seemed to be fairly common in stuff like small consumer electronics control panels, like on a VCR or DVD player. | 21:24:46 |
| pinealservo | Here's a fun example of good-sized keypad hooked up to an ATtiny85: http://www.technoblogy.com/show?NGM | 21:42:48 |
|  Roady McRoad joined the room. | 23:50:37 |
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| 20 Oct 2021 |
|  richarde1 joined the room. | 07:00:46 |
|  richardeoin left the room. | 07:09:50 |
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 burrbull | Fixed https://github.com/stm32-rs/stm32f4xx-hal/issues/366 | 16:31:29 |
| richarde1 left the room. | 21:44:37 |
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| 21 Oct 2021 |
 korken89 | Hmm, I have noticed a weird thing when playing with STM32H735, it seems that the SRAM regions are powered down (SRAM1-3), so initializing the RAM causes hardfault. How does one generally go about enabling the RAMs before initialization? | 13:46:58 |
| korken89 | * Hmm, I have noticed a weird thing when playing with STM32H735, it seems that the SRAM regions are powered down (SRAM1-3), so initializing the RAM causes hardfault. How does one generally go about enabling the RAMs before initialization? | 13:49:57 |
 jordens | either enable with assembly in pre_init (or whatever it's called) or enable in rust and then initialize (bss, data, text etc) manually in rust. | 13:56:48 |
| korken89 | Yeah, sounds like the main option to do it | 13:57:47 |
| korken89 | I've been hunting in the datasheet if there was some OTP bit that always enabled the SRAMs | 13:58:06 |
| korken89 | No luck :( | 13:58:12 |
| adamgreig | korken89: i think sram1/2 are disabled by default, but axi-sram and dtcm are both always-on? so i've mostly seen dtcm or axi-sram used for stacks/"RAM" in memory.x | 23:31:00 |
| 22 Oct 2021 |
| korken89 | Thanks for the tip! I was playing around with having Ethernet storage in some of the RAMs but stumbled on them not being initialized | 05:04:59 |
| korken89 | Ah right, it was because examples in the H7 HAL was using sram1 | 06:09:29 |
| korken89 | I guess it's enabled in some H7s and not in others | 06:10:11 |
