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stm32-rs

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Discussion and support for stm32-rs projects. History is publicly viewable. Bridged to #stm32-rs on Libera IRC. Code of conduct: https://www.rust-lang.org/conduct.html. Public logs: https://libera.irclog.whitequark.org/stm32-rs28 Servers

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18 May 2022
@therealprof:matrix.orgtherealprofFor instance if the bit is ressembling: read buffer full, you can clear it by reading the data from the data register. If the bits is ressembling: send buffer empty, then you "fix" that by putting data into the output register.08:04:31
@henrikssn:matrix.orghenrikssnOh, I see, thanks that makes it clear08:09:13
@henrikssn:matrix.orghenrikssnI'll make another dive into the reference manual then :)08:09:23
@hanno:braun-odw.euHanno Braun

Hey folks! I've been going through my drawers, clearing out stuff I'm unlikely to use. I found lots of STM32 boards, and I'm happy to donate them to anyone who will use them. Here's the list:

  • 2x STM32 F0 Discovery
  • 1x STM32F072 Discovery kit
  • 2x STM32F303 Discovery kit
  • 1x STM32F746 Nucleo-144
  • 2x STM32 LoRa and Sigfox Discovery kit
  • 2x STM32L433 Nucleo-64
  • 1x STM32L476 Discovery kit

Most are just lightly used or completely unused, the rest I used daily for client projects. Not sure they all work; I have vague memories about having problems with some, and don't remember if I threw those out.

I'd prefer sending as few packages as possible, so if anyone here can use a lot of them, or maybe has some local meetup where they can give them away, that would be great! If you're interested, feel free to send me your address in a private chat, or shoot me an email.

08:39:24
@henrikssn:matrix.orghenrikssnI wrote a little SPI demo, where I put the incoming RX data into a FIFO buffer and send it back out on TX15:02:57
@henrikssn:matrix.orghenrikssnI have no problems doing that at 7.8Mbit/sec even with a measly F411 at 100MHz 15:03:28
@henrikssn:matrix.orghenrikssn * I have no problems doing that at 7.8Mbit/sec even with a F411 at measly 100MHz 15:03:46
@henrikssn:matrix.orghenrikssn * I wrote a little SPI slave demo, where I put the incoming RX data into a FIFO buffer and send it back out on TX15:05:14
@therealprof:matrix.orgtherealprofI wouldn't expect this to be a problem. I've been pushing out north of 20Mbit/s of data via SPI on such a chip without a problem (without DMA).15:43:09
@henrikssn:matrix.orghenrikssnYeah I guess I had no idea of what I should expect15:45:30
@henrikssn:matrix.orghenrikssnMy demo is with DMA and 32 byte buffers15:45:49
@henrikssn:matrix.orghenrikssnI use two bbqueue's for rx/tx and just echoed the data on the other end15:46:25
@firefrommoonlight:matrix.orgfirefrommoonlightHey all. I noticed some (all?) STM32s have configurable "option bytes" for configuring flash memory. Is there a way for SVD2Rust /PACs to handle this? Maybe they do already? Thank you15:54:55
@firefrommoonlight:matrix.orgfirefrommoonlightFor example, configuring nboot0, dbank, nrst mode etc15:55:30
@firefrommoonlight:matrix.orgfirefrommoonlightI'm guessing out of scope? They're in a weird place and have diff write procedures from normal rega15:56:38
@firefrommoonlight:matrix.orgfirefrommoonlight* I'm guessing out of scope? They're in a weird place and have diff write procedures from normal regs15:56:43
@firefrommoonlight:matrix.orgfirefrommoonlightI guess they're part of the flash memory itself?15:57:05
@dirbaio:matrix.orgdirbaioyeah it's kind of a "weird flash"16:00:09
@dirbaio:matrix.orgdirbaioputting them in the PAC wouldn't work because you have to do special stuff to write them yep16:00:51
@firefrommoonlight:matrix.orgfirefrommoonlightI'll probably just do a raw reg write for now16:05:56
@firefrommoonlight:matrix.orgfirefrommoonlightAlso lol@ some G4 variants being configurable as 2 or 1 bank depending on how you set one of those options16:06:23
@adamgreig:matrix.orgadamgreigare the option byte registers not in the PAC as part of the flash peripheral?16:38:13
@adamgreig:matrix.orgadamgreigI'm pretty sure they are all accessed as registers inside the flash peripheral16:39:19
@dirbaio:matrix.orgdirbaioFLASH has regs to unlock writing to option regs16:39:36
@dirbaio:matrix.orgdirbaiobut option regs themselves are at 0x1fffsomething which is not the FLASH regs16:39:48
@adamgreig:matrix.orgadamgreigon stm32h7 at least there's registers in the flash memory space for programming the option registers16:40:49
@adamgreig:matrix.orgadamgreiglike FLASH_BOOT7_PRGR16:40:54
@dirbaio:matrix.orgdirbaioohh 🤔16:42:56
@adamgreig:matrix.orgadamgreigbut yea, looks like my f0 code just knows about the magic addresses to write to instead16:44:13
@firefrommoonlight:matrix.orgfirefrommoonlightInteresting re H719:05:18

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