2 Apr 2021 |
Mitch Bailey | How is openlane related to openroad? Is openlane a wrapper to the openroad flow or an enhancement? | 06:44:21 |
Rob Taylor | Mitch Bailey openlane uses openroad | 07:13:01 |
Rob Taylor | interesting project here for anyone into HLS - https://github.com/google/xls/issues/370 | 07:13:21 |
Amro Tork | In reply to@_slack_skywater-pdk_U017X0NM2E7:matrix.org How is openlane related to openroad? Is openlane a wrapper to the openroad flow or an enhancement? Openlane encompasses several tools including OpenRoad. It's an entire flow from RTL till GDS. | 11:20:09 |
Iztok Jeras | Hi, I would like to run some spice simulations of a digital netlist.
I went through README.md and built a digital block.
I created a spice simulation included the netlist, wrote stimuli, but I have trouble with cell and transistor libraries. | 19:34:06 |
Iztok Jeras | for cell libraries I used:
OPENLANE_ROOT/pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice
if included before the netlist, then cell blackboxes from the netlist are ignored
now I have trouble finding a proper set of primitive (transistor, ...) libraries | 19:36:58 |
Iztok Jeras | I experimented a bit with libraries from some other projects I found online, but they are incomplete (mising _lvt, _hvt parts). | 19:38:12 |
Iztok Jeras | What would be the preferred option to create a proper spice library? Preferably one where I can select the desired corner. | 19:39:58 |
3 Apr 2021 |
| David Murphy joined the room. | 03:20:37 |
Iztok Jeras | I think I got all the components I needed:
additional components from OPENLANE not part of the PDK
.INCLUDE ../../../pdks/open_pdks/sky130/custom/models/short.spice
.INCLUDE ../../../pdks/open_pdks/sky130/custom/models/diode.spice
library of primitives from https://github.com/google/skywater-pdk.git
.LIB ../../../../skywater-pdk/libraries/sky130_fd_pr/latest/models/sky130.lib.spice tt
* include Skywater 130nm cell libraries
.INCLUDE ../../../pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice | 10:33:10 |
| shbo changed their display name from Shubho to shbo. | 15:15:10 |
4 Apr 2021 |
Iztok Jeras | Is there a way to get a Standard Delay Format (SDF) file for the synthesis or a later stage verilog netlist? | 11:42:38 |
5 Apr 2021 |
Matt Liberty | Iztok Jeras opensta has a write_sdf command you could try from openroad | 03:04:54 |
| Matthew Guthaus joined the room. | 16:59:24 |
Matthew Guthaus | If I set STD_CELL_LIBRARY and re-run "make pdk", it seems that flow.tcl still doesn't get the new library. I'm doing this like:
export STD_CELL_LIBRARY="sky130_fd_sc_ls"
make pdk
make mount
echo $STD_CELL_LIBRARY (not set, so I set it again)
export STD_CELL_LIBRARY="sky130_fd_sc_ls"
./flow.tcl -design spm
...
INFO]: Extracting the number of available metal layers from /home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef
[ERROR]: during executing: "python3 /openLANE_flow/scripts/extract_metal_layers.py -t /home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef -o /openLANE_flow/designs/spm/runs/05-04_16-57/tmp/met_layers_list.txt"
[ERROR]: Exit code: 1
[ERROR]: Last 10 lines:
Traceback (most recent call last):
File "/openLANE_flow/scripts/extract_metal_layers.py", line 37, in module
with open(techlef_name, "r") as f:
FileNotFoundError: [Errno 2] No such file or directory: '/home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef' | 17:01:20 |
Matthew Guthaus | (make test also fails) | 17:02:06 |
Matthew Guthaus | It looks like this configuration configuration/general.tcl overwrites the library no matter what:
set ::env(STD_CELL_LIBRARY) "sky130_fd_sc_hd" | 18:26:54 |
_slack_skywater-pdk_U016ELL4X4M | [efabless/openlane] Issue opened by mguthaus | 18:33:48 |
Matthew Guthaus | In reply to@_slack_skywater-pdk_U016ELL4X4M:matrix.org [efabless/openlane] Issue opened by mguthaus I submitted a PR with the fix | 20:39:53 |
6 Apr 2021 |
| Yingwen Tan joined the room. | 00:39:36 |
| Ernesto Conde joined the room. | 14:15:31 |
Iztok Jeras | Matt Liberty I was looking at the write_sdf function from OpenSTA, and I can only partially use it to create a SDF file. | 15:49:24 |
Matt Liberty | Iztok Jeras what do you mean by "partially"? | 15:49:53 |
Iztok Jeras | I edited the Openlane script [sta.tcl ](https://github.com/efabless/openlane/blob/master/scripts/sta.tcl).
At the end of this script I added:
write_sdf $::env(opensta_report_file_tag).sdf
I haven't checked the details, but it appears to populate the min/max part of triples, but typ is left unpopulated.
I looked at the source code for write_sdf and it appears there is no code to populate the typ part of the triple. | 15:51:37 |
Iztok Jeras | This is the code for writing triples.
https://github.com/The-OpenROAD-Project/OpenSTA/blob/0d73b5b65a185329ea77478d4670d8a103b0b710/sdf/SdfWriter.cc#L412-L449 | 15:56:34 |
Matthew Guthaus | In reply to@_slack_skywater-pdk_U01EYE54L5N:matrix.org This is the code for writing triples.
https://github.com/The-OpenROAD-Project/OpenSTA/blob/0d73b5b65a185329ea77478d4670d8a103b0b710/sdf/SdfWriter.cc#L412-L449 It seems that would be an OpenRoad issue then? | 15:57:36 |
Iztok Jeras | The only way I see to get typical timing into a SDF file is to load the tt liberty file for either min or max or both and redo the export to sdf. | 15:58:32 |
Iztok Jeras | In reply to@_slack_skywater-pdk_U0175T39732:matrix.org It seems that would be an OpenRoad issue then? not obviously, since the STA tool itself focuses on min/max timing checks, they might not wish to consume memory for unused typical timing | 15:59:40 |
Iztok Jeras | In reply to@_slack_skywater-pdk_U01EYE54L5N:matrix.org not obviously, since the STA tool itself focuses on min/max timing checks, they might not wish to consume memory for unused typical timing but again, there is report_power, which is often observed at typical timing | 16:02:14 |
Iztok Jeras | In reply to@_slack_skywater-pdk_U01EYE54L5N:matrix.org but again, there is report_power, which is often observed at typical timing I tried a few ways to get the typical timing out, but I soon get conflicts with previously executed steps. So I decided to try to get some support, before I waste too much time. | 16:09:14 |