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skywater-pdk: openlane

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1 Apr 2021
@_slack_skywater-pdk_U01L8BR7FFA:matrix.orgNguyen.Dao
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Could we produce a 2x2 clb gds and then stitch together to make a bigger fabric?
Running time are almost same: 12s (1x2 clbs) and 13s (2x2 clbs)
13:05:49
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01L8BR7FFA:matrix.org
Running time are almost same: 12s (1x2 clbs) and 13s (2x2 clbs)
Interesting. Same for 3x3?
13:06:55
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Interesting. Same for 3x3?
I wonder - are you hitting memory limits and it’s going into swap?
13:07:14
@_slack_skywater-pdk_U01L8BR7FFA:matrix.orgNguyen.Dao
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
I wonder - are you hitting memory limits and it’s going into swap?
I haven’t tried 3x3, need to ask Jing to generate codes. I don’t think memory is limited, it used only 1% of memory (64GB) when routing
13:09:05
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01L8BR7FFA:matrix.org
I haven’t tried 3x3, need to ask Jing to generate codes. I don’t think memory is limited, it used only 1% of memory (64GB) when routing
Same when going the 4x4?
13:09:57
@_slack_skywater-pdk_U01L8BR7FFA:matrix.orgNguyen.Dao
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Same when going the 4x4?
yes, same memory at 1%
13:10:19
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01L8BR7FFA:matrix.org
yes, same memory at 1%
Very odd. Ok let’s get a 3x3 tested, find out where this breaks and then let’s submit a bug
13:11:16
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Very odd. Ok let’s get a 3x3 tested, find out where this breaks and then let’s submit a bug
Or maybe 2x4 if that’s easier
13:13:29
@_slack_skywater-pdk_U01L8BR7FFA:matrix.orgNguyen.Dao
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Or maybe 2x4 if that’s easier
it’s OK with 2x4, global routing took 16s, looks like the running time doesn’t go exponentially
15:30:51
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01L8BR7FFA:matrix.org
it’s OK with 2x4, global routing took 16s, looks like the running time doesn’t go exponentially
Weird!
15:33:59
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor
In reply to@_slack_skywater-pdk_U01GE4F371D:matrix.org
Weird!
Ok, it’d be good to prepare a test case that shows the working version and the non working version and submit that as a bug against openlane
15:34:36
@_slack_skywater-pdk_U016ELL4X4M:matrix.org_slack_skywater-pdk_U016ELL4X4M [efabless/openlane] Issue opened by nguyendao-uom 16:48:29
@_slack_skywater-pdk_U0199HJPH46:matrix.orgNayiri joined the room.21:08:28
2 Apr 2021
@_slack_skywater-pdk_U017X0NM2E7:matrix.orgMitch Bailey How is openlane related to openroad? Is openlane a wrapper to the openroad flow or an enhancement? 06:44:21
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor Mitch Bailey openlane uses openroad 07:13:01
@_slack_skywater-pdk_U01GE4F371D:matrix.orgRob Taylor interesting project here for anyone into HLS - https://github.com/google/xls/issues/370 07:13:21
@_slack_skywater-pdk_U01EK2VDMDG:matrix.orgAmro Tork
In reply to@_slack_skywater-pdk_U017X0NM2E7:matrix.org
How is openlane related to openroad? Is openlane a wrapper to the openroad flow or an enhancement?
Openlane encompasses several tools including OpenRoad. It's an entire flow from RTL till GDS.
11:20:09
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras Hi, I would like to run some spice simulations of a digital netlist. I went through README.md and built a digital block. I created a spice simulation included the netlist, wrote stimuli, but I have trouble with cell and transistor libraries. 19:34:06
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras for cell libraries I used: OPENLANE_ROOT/pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice if included before the netlist, then cell blackboxes from the netlist are ignored now I have trouble finding a proper set of primitive (transistor, ...) libraries 19:36:58
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras I experimented a bit with libraries from some other projects I found online, but they are incomplete (mising _lvt, _hvt parts). 19:38:12
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras What would be the preferred option to create a proper spice library? Preferably one where I can select the desired corner. 19:39:58
3 Apr 2021
@_slack_skywater-pdk_U01T0HJMKHA:matrix.orgDavid Murphy joined the room.03:20:37
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras I think I got all the components I needed:
 additional components from OPENLANE not part of the PDK
.INCLUDE ../../../pdks/open_pdks/sky130/custom/models/short.spice
.INCLUDE ../../../pdks/open_pdks/sky130/custom/models/diode.spice

 library of primitives from https://github.com/google/skywater-pdk.git
.LIB ../../../../skywater-pdk/libraries/sky130_fd_pr/latest/models/sky130.lib.spice tt

* include Skywater 130nm cell libraries
.INCLUDE ../../../pdks/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice
10:33:10
@_slack_skywater-pdk_U01F30ES9S8:matrix.orgshbo changed their display name from Shubho to shbo.15:15:10
4 Apr 2021
@_slack_skywater-pdk_U01EYE54L5N:matrix.orgIztok Jeras Is there a way to get a Standard Delay Format (SDF) file for the synthesis or a later stage verilog netlist? 11:42:38
5 Apr 2021
@_slack_skywater-pdk_U018LA3KZCJ:matrix.orgMatt Liberty Iztok Jeras opensta has a write_sdf command you could try from openroad 03:04:54
@_slack_skywater-pdk_U0175T39732:matrix.orgMatthew Guthaus joined the room.16:59:24
@_slack_skywater-pdk_U0175T39732:matrix.orgMatthew Guthaus If I set STD_CELL_LIBRARY and re-run "make pdk", it seems that flow.tcl still doesn't get the new library. I'm doing this like:
export STD_CELL_LIBRARY="sky130_fd_sc_ls"
make pdk
make mount
echo $STD_CELL_LIBRARY (not set, so I set it again)
export STD_CELL_LIBRARY="sky130_fd_sc_ls"
./flow.tcl -design spm
...
INFO]: Extracting the number of available metal layers from /home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef
[ERROR]: during executing: "python3 /openLANE_flow/scripts/extract_metal_layers.py -t /home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef -o /openLANE_flow/designs/spm/runs/05-04_16-57/tmp/met_layers_list.txt"
[ERROR]: Exit code: 1
[ERROR]: Last 10 lines:
Traceback (most recent call last):
  File "/openLANE_flow/scripts/extract_metal_layers.py", line 37, in  module 
    with open(techlef_name, "r") as f:
FileNotFoundError: [Errno 2] No such file or directory: '/home/mrg/openlane/pdks/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd.tlef'
17:01:20
@_slack_skywater-pdk_U0175T39732:matrix.orgMatthew Guthaus (make test also fails) 17:02:06
@_slack_skywater-pdk_U0175T39732:matrix.orgMatthew Guthaus It looks like this configuration configuration/general.tcl overwrites the library no matter what:
set ::env(STD_CELL_LIBRARY) "sky130_fd_sc_hd"
18:26:54

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