|26 Oct 2021|
In reply to @miless:matrix.orgI don't think so.
|27 Oct 2021|
|moerk||valff seams like they pursue the same goal as you. I am not sure of the difference yet.||10:43:08|
|31 Oct 2021|
|@chile09:matrix.org joined the room.||02:15:02|
|mustafara joined the room.||18:23:01|
|4 Nov 2021|
|MGlolenstine joined the room.||07:04:57|
|MGlolenstine||Will drone-os support Cortex M0+ CPUs in the future? It currently seems to favour M3 and M4Fs||07:05:37|
|valff||Absolutely, Cortex-M0+ support is currently in progress. Also there will be support for symmetrical multi-core.||07:26:54|
I'm trying to build for STM32f469, but I get an error...
project is an unchanged version that's generated using
In reply to @valff:matrix.orgIf I remember correctly M0+ does not have atomic instructions required for lockless structures used in Drone? How is it going to work? Thx.
In reply to @mglolenstine:matrix.orgLooks like
|MGlolenstine||Was there something wrong in the init command?||21:20:29|
In reply to @grawp:matrix.orgWe will have to use critical sections. And for RP2040 I plan to use its custom hardware spinlocks and FIFOs where possible.
In reply to @mglolenstine:matrix.orgNot sure, need to test.
In reply to @valff:matrix.orgAnd are RISC-V and M3/4 going to keep being critical-section-less?
|valff||Yes, of course.||21:32:36|
|grawp||If by the custom hardware you mean the PIOs, then that sounds very intriguing!||21:44:10|
|valff||I didn't mean PIOs, doubt that they can be used for this. But RP2040 has hardware spinlocks and FIFOs as custom peripherals.||21:51:50|
|5 Nov 2021|
|MGlolenstine||A random, probably stupid question... Would Atmega328p CPUs be supported? They're running 8bit RISC CPU architecture...||06:32:02|
|Thibaut Vandervelden set a profile picture.||09:01:46|
In reply to @mglolenstine:matrix.org
AVR is kinda supported by Rust (https://www.avr-rust.com/) but supporting AVR MCUs does not make sense IMHO:
|MGlolenstine|| Thank you for the useful insight.|
I didn't know that AVR and Cortex were so far apart.
I used to do Arduino development at school (they said it was the cheapest way), but now I'm starting to doubt it.
What does the number in
|grawp||At first you have an architecture like ARMv7E-M, ARMv7M, ARMv6-M which specifies instruction set and some other things (like system bus perhaps?). Then you have Cortex M0, 1, 3, 3F, 4, 4F which are like basic extensions of those architectures (e.g Cortex M4/7(F) extends ARMv7E-M). They bring some common things like interrupt handling workflow and its registers, basic system timer and some other things. Basically everything you need for running an OS and doing some common things. Vendor buys plans for those cores and add its peripheries. For example STM32F4xx can have completely different peripheries than some Atmel MCU based on CortexM4 buy they both have the same system timer and same final interrupt handling. Btw. I have not yet came accross something that implements those architectures like e.g. ARMv7E-M while not implementing Cortex M4/7 but technically it's possible. The M0 is just a name I think. Don't know whether there is some technicality it's derived from.||14:01:31|
There are many non-Arduino-HW boards which can run the Arduino libraries and be used with Arudino text editor (it's not really an IDE) which are also based on various architectures like AVR, ARM, and I think also RISC-V based architectures.
|MGlolenstine||Wow, that's a lot of interesting information 😯 Thanks for wrapping it together. I have met with arm and cortex names, but didn't really connect them together in this way.||14:48:21|
|8 Nov 2021|
I'm having slight feelings of deprecation in
I'm wondering what I can do about it.
Is the best way just pulling the repos and adding
In reply to @mglolenstine:matrix.orgTry to use the compiler specified on the Drone OS `rust-toolchain` as some of these errors are related to newer rustc versions