| 26 Jul 2024 |
 lulingar | for my ESP32C3 boards, I don't have to activate ESP-IDF on the shell | 08:28:39 |
 vollbrecht | well we do alot of setup in our esp-idf buildscript but we do not setup the rustc xtensa compiler for you, so somewhere in the past you did that. | 08:29:28 |
| vollbrecht | or are you using containers or such? | 08:30:25 |
| vollbrecht | btw sorry for bombarding you witch such question, you just raised my curiosity that you seam to not using espup when compiling against xtensa :D | 08:33:15 |
| vollbrecht | * btw sorry for bombarding you witch such question, you just raised my curiosity by stating not using espup when compiling against xtensa :D | 08:33:52 |
| lulingar | No worries! If that's the case then surely I did that. Unfortunately I haven't had time to have a consistent usage of Rust, so I got started a good while ago, then stopped, then resumed, etc. | 08:47:01 |
| lulingar | I'm not using containers, so certainly I must have installed rustc for xtensa at some point. | 08:47:23 |
| lulingar | I guess espup handles that part conveniently now. | 08:47:46 |
 plaes | bjoernQ: Any possibility to try out this code on other chips than esp32 (revision v3.0)?
https://github.com/plaes/rust-lilygo-ttgo-lora32/blob/9ddd03b94c287baf7662dd80eee2d12811b3d8bf/src/spi_test.rs#L109-L119
I'm interested of the output, I feel that something is still off on async side on esp32:
[INFO] - SPI 3 (read previous buffer)...
[INFO] - ... result: [5, 0, 0, 0, 0, 0]
| 09:40:12 |
 Dominic Fischer | In reply to @randomexplosion:matrix.org
critical section mutexes don't block do they? Yes they do | 09:53:21 |
| Dominic Fischer | Unfortunately on multicore chips they block in interrupts too, which I don't like but it is what it is. | 09:57:45 |
| Dominic Fischer | In reply to @proffan:matrix.org
Something is not quite right after I upgrade to 1.80, I sometimes reach a state where both cores are in 'waiti` and all tasks stopped. After a while some random interrupt triggered, and things starts to go again Isn't that how it's supposed to work? | 09:58:32 |
 bjoernQ | In reply to @plaes:matrix.org
bjoernQ: Any possibility to try out this code on other chips than esp32 (revision v3.0)?
https://github.com/plaes/rust-lilygo-ttgo-lora32/blob/9ddd03b94c287baf7662dd80eee2d12811b3d8bf/src/spi_test.rs#L109-L119
I'm interested of the output, I feel that something is still off on async side on esp32:
[INFO] - SPI 3 (read previous buffer)...
[INFO] - ... result: [5, 0, 0, 0, 0, 0]
I can have a look | 10:00:45 |
|  @slusheea:matrix.org left the room. | 11:30:07 |
 RandomExplosion | Oh cool, good to know, Thx Dominic! | 14:51:32 |
 proffan | In reply to @dominaezzz:matrix.org
Isn't that how it's supposed to work? With multiple active Tickers | 16:06:06 |
| proffan | The esp32-s3 seems dead for about 20 seconds, then started to work again | 16:06:45 |
| proffan | No reset happened btw | 16:07:21 |
| bjoernQ | In reply to @proffan:matrix.org
The esp32-s3 seems dead for about 20 seconds, then started to work again If you can provide a minimal repro please open an issue | 16:32:23 |
| Dominic Fischer | Ah I see | 17:13:13 |
| proffan | In reply to @bjoernq:matrix.org
If you can provide a minimal repro please open an issue Trying to minimize it, scratching my head now | 17:29:55 |
| proffan | Redacted or Malformed Event | 17:39:03 |
| proffan | Also the Executor::run() loop is actively looping | 17:40:56 |
| proffan | Also happens only with 1 core, let me check the ISRs | 17:55:10 |
| proffan | * Happens regardless of single or dual core, let me check the ISRs | 18:15:23 |
| proffan | Most likely it's the SPI DMA driver, still rootcausing (I am using 0.19.0, should I try current GitHub main first?) | 19:14:55 |
| bjoernQ | In reply to @proffan:matrix.org
Most likely it's the SPI DMA driver, still rootcausing (I am using 0.19.0, should I try current GitHub main first?) If it's reproducible with the latest release version it's definitely worth creating an issue. Thanks! | 19:20:08 |
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|  Danylo changed their display name from knightpp to Danylo. | 21:48:25 |
